The present invention relates to testing circuits, and more specifically, to testing circuits using groups of possibly bypassable tests.
In the manufacturing of integrated circuits, testing is a required yet time consuming and expensive procedure. This is the case whether testing is performed at wafer level or after assembly. Adequate testing is required to ensure a reliable product. However, unnecessary additional testing increases both overall time to market and manufacturing cost. Current testing methods perform a large amount of unnecessary testing which increases both time to market and cost. Therefore, a need exists to reduce testing time and eliminate unnecessary tests in order to improve processing time and cost while continuously ensuring a reliable product.